Publications
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Journal Articles
2023 | 2022 | 2021 | 2020 | 2019 | 2018 | 2017 | 2016 | 2015 | 2014 | 2013 | 2012 | 2011 |2010 | 2009 | 2008 | 2007
Conference Proceedings and Presentations
2023 | 2022 | 2021 | 2020 | 2019 | 2018 | 2017 | 2016 | 2014 | 2013 | 2012 | 2011 | 2010 | 2009 | 2008 | 2007
Journal Articles
2023
1) J. Cai, Z. Sun, P. Wu, R. Tripathi, H.-Y. Lan, J. Kong, Z. Chen, and J. Appenzeller, "High-Performance Complementary Circuits from Two-Dimensional MoTe2," Nano Letters 23, 10939-10945 (2023).(link to article)
2) C.-C. Chiang, H.-Y. Lan, L. Liu, Y.P. Chen, D. Zemlyanov, J. Appenzeller, and Z. Chen, "Design and Process Co-optimization of 2D Monolayer Transistors via Machine Learning," IEEE Transaction on Electron Devices 70, 5991-5996 (2023).(link to article)
3) H.-Y. Lan, V.P. Oleshko, A.V. Davydov, J. Appenzeller, and Z. Chen, "Dielectric Interface Engineering for High-Performance Monolayer MoS2 Transistors via TaOx Interfacial Layer," IEEE Transaction on Electron Devices 70, 2067-2074 (2023).(link to article)
4) T. Shen, O. Hassan, N. Dilley, S. Datta, K.Y. Camsari, and J. Appenzeller, "A magnetoelectric memory device based on pseudo-magnetization," Journal of Applied Physics 134, 033901-1-11 (2023).(link to article)
2022
1) Z. Cheng, C.-S. Pang, P. Wang, S.T. Le, Y. Wu, D. Shahrjerdi, I. Radu, M. Lemme, L.-M. Peng, X. Duan, Z. Chen, J. Appenzeller, S.J. Koester, E. Pop, A.D. Franklin, and C.A. Richter, "How to Report and Benchmark Emerging Field-Effect Transistors," Nature Electronics 5, 416-423 (2022).(link to article)
2) P. Wu, M. Li, B. Zhou, X.S. Hu, and J. Appenzeller, "Cross-Coupled Gated Tunneling Diodes with Unprecedented PVCRs Enabling Compact SRAM Design - Part I: Device Concept," IEEE Transaction on Electron Devices 69, 6078-6084 (2022).(link to article)
3) P. Wu, M. Li, B. Zhou, X.S. Hu, and J. Appenzeller, "Cross-Coupled Gated Tunneling Diodes with Unprecedented PVCRs Enabling Compact SRAM Design - Part II: SRAM Circuit," IEEE Transaction on Electron Devices 69, 6085-6088 (2022).(link to article)
4) P.Wu and J. Appenzeller, "Explaining Steep-Slope Switching in Carbon Nanotube Dirac-Source Field-Effect Transistors," IEEE Transaction on Electron Devices 69, 5270-5275 (2022).(link to article)
5) P.Wu and J. Appenzeller, "Design Considerations for 2D Dirac-Source FETs – Part I: Basic Operation and Device Parameters," IEEE Transaction on Electron Devices 69, 4674-4680 (2022).(link to article)
6) P.Wu and J. Appenzeller, "Design Considerations for 2D Dirac-Source FETs – Part II: Non-Idealities and Benchmarking," IEEE Transaction on Electron Devices 69, 4681-4685 (2022).(link to article)
7) C.-C. Chiang, H.-Y. Lan, C.-S. Pang, J Appenzeller, and Z. Chen, "Air-Stable P-doping in Record High Performance Monolayer WSe2 Devices," IEEE Electron Device Letters 43, 319-322 (2022).(link to article)
8) Z. Sun, C.-S. Pang, P. Wu, T.Y.T. Hung, M.-Y. Li, S.L. Liew, C.-C. Cheng, H. Wang, H.-S. P. Wong, L.-J. Li, I. Radu, Z. Chen, and J. Appenzeller, "Statistical Assessment of High Performance Scaled Double Gate Transistors from Monolayer WS2," ACS Nano 16, 14942-14950 (2022).(link to article)
9) A.B. Solanki, S.I. Bogdanov, M.M. Rahman, A. Rustagi, N. Dilley, T. Shen, W. Tong, P. Debashish, Z. Chen, J. Appenzeller, Y. Chen, V.M. Shalaev and P. Upadhyaya, "Electric field control of interaction between magnons and quantum spin defects," Physical Review Research 4, L012025-1-7 (2022).(link to article)
2021
1) P. Wu and J. Appenzeller, "Artificial Sub-60 Millivolts/Decade Switching in a Metal–Insulator–Metal–Insulator–Semiconductor Transistor without a Ferroelectric Component," ACS Nano 15, 5158-5164 (2021).(link to article)
2) C.-S. Pang, P. Wu, J. Appenzeller, and Z. Chen, "Thickness-Dependent Study of High- Performance WS2-FETs With Ultrascaled Channel Lengths," IEEE Transactions on Electron Devices 68,2123-2129 (2021).(link to article)
3) C.-C. Chiang, V. Ostwal, C.-S. Pang, P. Wu, F. Zhang, Z. Chen, and J. Appenzeller, "Memory applications from 2D materials," Applied Physics Reviews 8,021306 (2021). (link to article)
4) S. Das, A. Sebastian, E. Pop, C. McClellan, A.D. Franklin, T. Grasser, T. Knobloch, Y. Illarionov, A.V. Penumatcha, J. Appenzeller, Z. Chen, W. Zhu, I. Asselberghs, L.-J. Li, U.E. Avci, N. Bhat, Th.D. Anthopoulos, and R. Singh, "Transistors based on two-dimensional materials for future integrated circuits," Nature Electronics Review 4,786-799 (2021). (link to article)
5) C.-S. Pang, R. Zhou, X. Liu, P. Wu, T.Y.T. Hung, S. Guo, M.E. Zaghloul, S. Krylyuk, A.V. Davydov, J. Appenzeller, and Z. Chen, "Mobility Extraction in 2D Transition Metal Dichalcogenide Devices — Avoiding Contact Resistance Implicated Overestimation," Small 17,2100940 (2021). (link to article)
2020
1) P. Wu, D. Reis, X.S. Hu and J. Appenzeller, "Two-Dimensional Transistors with Reconfigurable Polarities for Secure Circuits," Nature Electronics 4, 45-53 (2020).(link to article)
2) P. Debashis, V. Ostwal, R. Faria, S. Datta, J. Appenzeller, Z. Chen, "Hardware implementation of Bayesian network building blocks with stochastic spintronic devices," Scientific Reports 10, 16002 (2020).(link to article)
3) T. Shen, V. Ostwal, K.Y. Camsari, and J. Appenzeller, "Demonstration of a pseudo-magnetization based simultaneous write and read operation in a Co60Fe20B20/Pb(Mg1/3Nb2/3)0.7Ti0.3O3 heterostructure," Scientific Reports 10, 10791 (2020).(link to article)
4) K. Camsari, P. Debashis, V. Ostwal, A.Z. Pervaiz, T. Shen, Z. Chen, S. Datta and J. Appenzeller, "From Charge to Spin and Spin to Charge: Stochastic Magnets for Probabilistic Switching," IEEE Proceedings 108, 1322-1337 (2020).(link to article)
5) V. Ostwal, T. Shen, and J. Appenzeller, "Efficient spin-orbit torque switching of the semiconducting van der Waals ferromagnet Cr2Ge2Te6," Advanced Materials 32, 1906021-1–1906021-7 (2020).(link to article)
2019
1) P. Wu and J. Appenzeller, "Towards CMOS like devices from two-dimensional channel materials," Applied Physics Letters Materials 7, 100701-1–100701-7 (2019).(link to article)
2) T. Shen, D. Valencia, Q. Wang, K.-C. Wang, M. Povolotskyi, M.J. Kim, G. Klimeck, Z. Chen, and J. Appenzeller, "MoS2 for enhanced electrical performance of ultrathin copper films," ACS Applied Materials and Interfaces 11, 28345-28351 (2019).(link to article)
3) V. Ostwal and J. Appenzeller, "Spin-orbit torque controlled Magnetic Tunnel Junction with low thermal stability for tunable random number generation," IEEE Magnetics Letters 10, 4503305-1 – 4503305-5 (2019).(link to article)
4) P. Wu and J. Appenzeller, "Reconfigurable Black Phosphorus Vertical Tunneling Field-Effect Transistor with Record High ON-Currents," IEEE Electron Device Letters 40, 981-984 (2019).(link to article)
5) P. Wu, T. Ameen, H. Zhang, L.A. Bendersky, H. Ilatikhameneh, G. Klimeck, R. Rahman, A.V. Davydov, and J. Appenzeller, " Complementary Black Phosphorus Tunneling Field-Effect Transistors," ACS Nano 13, 377-385 (2019).(link to article)
6) V. Ostwal, R. Zand, R. DeMara, and J. Appenzeller, "A novel compound synapse using probabilistic spin-orbit-torque switching for MTJ based deep neural networks," IEEE JxCDC 5, 182-187 (2019).(link to article)
2018
1) F. Zhang, H. Zhang, S. Krylyuk, C.A. Milligan, Y. Zhu, D.Y. Zemlyanov, L.A. Bendersky, B.P. Burton, A.V. Davydov and J. Appenzeller, "Electric field induced structural transition in vertical MoTe2 and Mo1-xWxTe2 based resistive memories," Nature Materials 18, 55 - 61 (2019).(link to article)
2) V. Ostwal, P. Debashis, R. Faria, Z. Chen, and J. Appenzeller, "Spin-torque devices with hard axis initialization as Stochastic Binary Neurons," Scientific Reports 8, 8:16689-1 - 8:16689-8 (2018). (link to article)
3) C. Chen, T.A. Ameen, H. Ilatikhameneh, R. Rahman, G. Klimeck, and J. Appenzeller, "Channel thickness optimization for ultra thin and 2D chemically doped TFETs," IEEE Transactions on Electron Devices 65, 4614-4621 (2018).(link to article)
4) B. Stampfer, F. Zhang, Y. Illarionov, T. Knobloch, P. Wu, M. Waltl, A. Grill, J. Appenzeller, and T. Grasser, "Characterization of Single Defects in Ultra-Scaled MoS2 Field-Effect Transistors," ACS Nano 12, 5368-5375 (2018).(link to article)
5) F. Zhang, C.-H. Lee, J.A. Robinson, and J. Appenzeller, "Exploration of channel width scaling and edge states in transition metal dichalcogenides," Nano Research 11, 1768-1774 (2018).(link to article)
2017
1) Y. Zhu, R. Zhou, F. Zhang and J. Appenzeller, "Vertical charge transport through transition metal dichalcogenides – A quantitative analysis –," Nanoscale 9, 19108-19113 (2017).(link to article)
2) V. Ostwal, A. Penumatcha, Y.-M. Hung, A.D. Kent and J. Appenzeller, "Spin Orbital Torques based Ferromagnet switching in Pt/Cu/[Co/Ni]4 multilayer structure," Journal of Applied Physics 122, 213905-1-213905-6 (2017). (link to article)
3) A. Prakash, H. Ilatikhemeneh, P. Wu, and J. Appenzeller, "Understanding contact gating in Schottky barrier transistors from 2D channels," Scientific Reports 7, 7:12596-1 - 7:12596-9 (2017). (link to article)
4) R. Zhou, V. Ostwal, and J. Appenzeller, "Vertical versus lateral two-dimensional heterostructures - On the topic of atomically abrupt p/n-junctions," Nano Letters 17, 4787-4792 (2017). (link to article)
5) Y. Zhu, R. Zhou, L. Wang, S.S. Wong, and J. Appenzeller, "Utilizing Electrical Characteristics of Individual Nanotube Devices to study the Charge Transfer between CdSe Quantum Dots and DWNTs," ACS Energy Letter 2, 717-725 (2017). (link to article)
6) A. Prakash and J. Appenzeller, "Bandgap Extraction and Device Analysis of Ionic Liquid Gated WSe2 Schottky Barrier Transistors," ACS Nano 11, 1626-1632 (2017). (link to article)
2016
1) T. Shen, A.V. Penumatcha, and J. Appenzeller, "Strain Engineering for Transition Metal Dichalcogenide Based Field Effect Transistors," ACS Nano 10, 4712-4718 (2016). (link to article)
2) H. Ilatikhemeneh, R.B. Salazar, G. Klimeck, R. Rahman, and J. Appenzeller, "From Fowler-Nordheim to Non-Equilibrium Green’s Function Modeling of Tunneling," IEEE Transactions on Electron Devices 63, 2871-2878 (2016). (link to article)
3) M. R. Muller, R. Salazar, S. Fathipour, H. Xu, K. Kallis, U. Kunzelmann, A. Seabaugh, J. Appenzeller, and J. Knoch, "Gate-Controlled WSe2 Transistors Using a Buried Triple-Gate Structure," Nanoscale Research Letters 11:512, 1-6 (2016). (link to article)
4) A. Azcatl, X. Qin, A. Prakash, C. Zhang, L. Cheng, Q. Wang, N. Lu, M.J. Kim, J. Kim, K. Cho, R. Addou, C.L. Hinkle, J. Appenzeller, and R.M. Wallace, "Covalent Nitrogen Doping and Compressive Strain in MoS2 by Remote N2 Plasma Exposure," Nano Letters 16, 5437-5443 (2016). (link to article)
5) L. Wang, J. Han, B. Sundahl, S. Thornton, Y. Zhu, R. Zhou, C. Jaye, H. Liu, Z.-Q. Li, G. Taylor, D. Fischer, J. Appenzeller, R.J. Harrison, and S.S. Wong, "Ligand-induced Dependence of Charge Transfer in Nanotube – Quantum Dot Heterostructures," Nanoscale 8, 15553-15570 (2016). (link to article)
6) H. Ilatikhemeneh, G. Klimeck, J. Appenzeller, and R. Rahman, "Design Rules for High Performance Tunnel Transistors from 2D Materials," IEEE Journal of the Electron Devices Society 4, 260-265 (2016). (link to article)
7) A.V. Penumatcha , C.-C. Lin, V.Q. Diep, S. Datta, J. Appenzeller, and Z. Chen, "Impact of scaling on the dipolar coupling in Magnet-Insulator-Magnet structures," IEEE Transactions on Magnetics 52, 3400207 - 3400207-7 (2016). (link to article)
2015
1) R. Salazar, H. Ilatikhameneh, R. Rahman, G. Klimeck, and J. Appenzeller, "A predictive analytic model for high-performance tunneling field-effect transistors approaching non-equilibrium Green's function simulations," Journal of Applied Physics 118, 164305-1-164305-11 (2015). (link to article)
2) L. Wang, J. Han, Y. Zhu, R. Zhou, C. Jaye, H. Liu, Z.-Q. Li, G. Taylor, D. Fischer, J. Appenzeller, S.S. Wong, "Probing the Dependence of Electron Transfer on Size and Coverage in Carbon Nanotube-Quantum Dot Heterostructures," The Journal of Physical Chemistry 119, 26327–26338 (2015). (link to article)
3) A.V. Penumatcha, S.R. Das, Z. Chen, and J. Appenzeller, "Spin-torque switching of a nano-magnet using giant spin hall effect," AIP Advances 5, 107144 (2015). (link to article)
4) Y. Zhu and J. Appenzeller, "On the Current Drive Capability of Low Dimensional Semiconductors: 1D versus 2D," Nanoscale Research Letters 10, 10:425-1 – 10:425-8 (2015). (link to article)
5) A.V. Penumatcha, R. Salazar and J. Appenzeller, "Analysing black phosphorus transistors using an analytic Schottky barrier MOSFET model," Nature Communications 6, 6:8948-1 – 6:8948-8 (2015). (link to article)
6) H. Ilatikhemeneh, T.A. Ameen, G. Klimeck, J. Appenzeller, and R. Rahman, "Dielectric Engineered Tunnel Field-Effect Transistor," IEEE Electron Device Letters 36, 1097-1100 (2015). (link to article)
7) H. Ilatikhemeneh, G. Klimeck, J. Appenzeller, and R. Rahman, "Scaling Theory of Electrically Doped 2D Transistors," IEEE Electron Device Letters 36, 726-728 (2015). (link to article)
8) H. Ilatikhemeneh, Y. Tan, B. Novakovic, Z. Chen, G. Klimeck, R. Rahman , and J. Appenzeller, "Tunnel Field-Effect Transistors in Transition Metal Dichalcogenide Materials," IEEE J. Exploratory Solid-State Computational Devices and Logic Circuits 1, 12-18 (2015). (link to article)
2014
1) S. Das, A. Prakash, R. Salazar, and J. Appenzeller, "Towards Low Power Electronics: Tunneling Phenomena in Transition Metal Dichalcogenides," ACS nano 8, 1681-1689 (2014). (link to article)
2) C.-C. Lin, Y. Gao, A.V. Penumatcha, V.Q. Diep, J. Appenzeller, and Z. Chen, "Improvement of spin transfer torque in asymmetric graphene devices," ACS nano 8, 3807-3812 (2014). (link to article)
3) A. Razavieh, P.K. Mohseni, K. Jung, S. Mehrotra, S. Das, S. Suslov, X. Li, G. Klimeck, D. Janes, and J. Appenzeller, "Effect of Diameter Variation on Electrical Characteristics of Schottky Barrier Indium Arsenide Nanowire Field-Effect Transistors," ACS nano 8, 6281-6287 (2014). (link to article)
4) S. Fathipour, N. Ma, W.S. Hwang, V. Protasenko, S. Vishwanath, H.G. Xing, H. Xu, D. Jena, J. Appenzeller, and A. Seabaugh, "Exfoliated multilayer MoTe2 field-effect transistors," Applied Physics Letters 105, 192101-1-3 (2014). (link to article)
5) F. Zhang and J. Appenzeller, "Tunability of short-channel effects in MoS2 field-effect devices," Nano Letters 15, 301-306 (2014). (link to article)
2013
1) H.-Y. Chen and J. Appenzeller, "Coulomb Drag Between In-plane Graphene Double Ribbons and the Impact of the Dielectric Constant," Nano Research 6, 897-905 (2013). (link to article)
2) C.-C. Lin, A.V. Penumatcha, Y. Gao, V.Q. Diep, J. Appenzeller, and Z. Chen, "Spin-transfer Torque in a Graphene Lateral Spin Valve Assisted by an External Magnetic Field," Nano Letters 13, 5177-5181 (2013). (link to article)
3) S. Das and J. Appenzeller, "WSe2 field effect transistors with enhanced ambipolar characteristics," Applied Physics Letters 103, 103501-1-5 (2013). (link to article)
4) S. Das and J. Appenzeller, "Where does the Current flow in Two Dimensional Layered Systems," Nano Letters 13, 3396-3402 (2013). (link to article)
5) A. Razavieh, D. Janes, and J. Appenzeller, "Transconductance Linearity Analysis of 1-D, Nanowire FETs in the Quantum Capacitance Limit," IEEE Transactions on Electron Devices 60, 2071-2076 (2013). (link to article)
6) A. Razavieh, S. Mehrotra, N. Singh, G. Klimeck, D. Janes, and J. Appenzeller, "Utilizing the Unique Properties of Nanowire MOSFETs for RFApplications," Nano Letters 13, 1549-1554 (2013). (link to article)
7) S. Das and J. Appenzeller, "Screening and Interlayer Coupling in Multilayer MoS2," Physica Status Solidi (Rapid Research Letters) 7, 268-273 (2013). (link to article)
8) S. Das, H.-Y. Chen, A.V. Penumatcha, and J. Appenzeller, "High performance multi-layer MoS2 transistors with scandium contacts,"
Nano Letters 13, 100-105 (2013). (link to article)
2012
1) R.B. Salazar, S. Mehrotra, G. Klimeck, N. Singh, and J. Appenzeller "Observation of 1D behavior in Si nanowires: Towards high-performance TFETs," Nano Letters 12, 5571-5575 (2012). (link to article)
2) S. Das and J. Appenzeller, "On the Anomalous Scaling Behavior of Organic Ferroelectric Copolymer PVDF-TrFE," Organic Electronics 13, 3326-3332 (2012). (link to article)
3) Y. Zhao, D. Candebat, C. Delker, Y. Zi, D. Janes, J. Appenzeller, and C. Yang, "Understanding the impact of Schottky barriers on the performance of narrow bandgap nanowire field effect transistors," Nano Letters 12, 5331-5336 (2012). (link to article)
4) H.-Y. Chen and Joerg Appenzeller, "On the Voltage Gain of Complementary Graphene Voltage Amplifiers With Optimized Doping," IEEE Electron Device Letters 33, 1462-1464 (2012). (link to article)
5) Y. Zi, Y. Zhao, D. Candebat, J. Appenzeller, and C. Yang "Synthesis of Antimony-Based Nanowires Using the Simple Vapor Deposition Method," European Journal of Chemical Physics and Physical Chemistry 13, 2585-2588 (2012). (link to article)
6) H.-Y. Chen and J. Appenzeller, "Graphene-based frequency tripler," Nano Letters 12, 2067-2070 (2012). (link to article)
7) J. Knoch, Z. Chen, and J. Appenzeller, "Properties of metal-graphene contacts," IEEE Transactions on Nanotechnology 11, 513-519 (2012). (link to article)
2011
1) D. Berdebes, T. Low, Y. Sui, J. Appenzeller, and M. Lundstrom, "Substrate gating of contact resistance in graphene transistors"
IEEE Transactions on Electron Devices 58, 3925-3932 (2011). (link to article)
2) J. T. Smith, S. Das, and J. Appenzeller, “Broken-gap tunnel MOSFET: A constant-slope sub-60-mV/decade transistor,” IEEE Electron Device Lett., vol. 32, no. 10, Oct. 2011. (link to article)
3) S. Das and J. Appenzeller, “FETRAM - An organic ferroelectric material based novel random access memory cell,” Nano Lett., vol. 11, pp. 4003–4007, Sep. 2011. (link to article)
4) S. Das and J. Appenzeller, “On the importance of band gap formation in graphene for analog device application,” IEEE Trans. Nanotechnol., vol. 10, no. 5, pp. 1093–1098, Sep. 2011. (link to article)
5) J. T. Smith, C. Sandow, S. Das, R. A. Minamisawa, S. Mantl, and J. Appenzeller, “Silicon nanowire tunneling field-effect transistor arrays: Improving subthreshold performance using excimer laser annealing,” IEEE Trans. Electron Dev., vol. 58, no. 7, pp. 1822–1829, Jul. 2011. (link to article)
6) Y. Zhao, J. T. Smith, J. Appenzeller, and C. Yang, “Transport modulation in Ge/Si core/shell nanowires through controlled synthesis of doped Si shells,” Nano. Lett., vol. 11, pp. 1406–1411, Apr. 2011. (link to article)
7) Y. Sui, T. Low, M. Lundstrom, and J. Appenzeller, “Signatures of disorder in the minimum conductivity of graphene,” Nano. Lett., vol. 11, pp. 1319–1322, Mar. 2011. (link to article)
2010
1) J. Knoch and J. Appenzeller, “Modeling of high-performance p-type III-V heterojunction tunnel FETs,” IEEE Electron Device Lett., vol. 31, no. 4, pp. 305–307, Apr. 2010. (link to article)
2009
1) T. Low and J. Appenzeller, “Electronic transport properties of a tilted graphene p-n junction,” Phys. Rev. B, vol. 80, pp. 155406-1–7, Oct. 2009. (link to article)
2) Y. Sui and J. Appenzeller, “Screening and interlayer coupling in multilayer graphene field-effect transistors,” Nano. Lett., vol. 9, pp. 2973–2977, Aug. 2009. (link to article)
3) T. Low, S. Hong, J. Appenzeller, S. Datta, and M. S. Lundstrom, “Conductance asymmetry of graphene p-n junction,” IEEE Trans. Electron Dev., vol. 56, no. 6, pp. 1292–1299, Jul. 2009. (link to article)
2008
1) J. Appenzeller, J. Knoch, M. I. Bjork, H. Riel, H. Schmid, and W. Riess, “Toward nanowire electronics,” IEEE Trans. Electron Dev., vol. 55, no. 11, pp. 2827–2845, Nov. 2008. (link to article)
2) O. Gunawan, L. Sekaric, A. Majumdar, M. Rooks, J. Appenzeller, J. W. Sleight, S. Guha, and W. Haensch, “Measurement of carrier mobility in silicon nanowires,” Nano. Lett., vol. 8, pp. 1566–1571, Jun. 2008. (link to article)
3) J. Knoch, W. Riess, and J. Appenzeller, “Outperforming the conventional scaling rules in the quantum-capacitance limit,” IEEE Electron Device Lett., vol. 29, no. 4, pp. 372–374, Apr. 2008. (link to article)
4) J. Knoch and J. Appenzeller, “Tunneling phenomena in carbon nanotube field-effect transistors,” Phys. Stat. Sol. (A), vol. 205, no. 4, pp. 679–694, Apr. 2008. (link to article)
5) J. Appenzeller, “Carbon nanotubes for high-performance electronics - Progress and prospect,” Proc. IEEE, vol. 96, pp. 201–211, Feb. 2008. (link to article)
6) Z. Chen, D. Farmer, S. Xu, R. Gordon, P. Avouris, and J. Appenzeller, “Externally assembled gate-all-around carbon nanotube field-effect transistor,” IEEE Electron Device Lett., vol. 29, no. 2, pp. 183–185, Feb. 2008. (link to article)
2007
1) J. Knoch, M. Zhang, J. Appenzeller, and S. Mantl, “Physics of ultrathin-body silicon-on-insulator Schottky-barrier field-effect transistors,” Appl. Phys. A, vol. 87, pp. 351–357, Jun. 2007. (link to article)
2) K. M. Indlekofer, J. Knoch, and J. Appenzeller, “Understanding Coulomb effects in nanoscale Schottky-barrier-FETs,” IEEE Trans. Electron Dev., vol. 54, no. 6, pp. 1502–1509, Jun. 2007. (link to article)
3) J. Appenzeller, Y.-M. Lin, J. Knoch, Z. Chen, and Ph. Avouris, “1/f noise in carbon nanotube devices - On the impact of contacts and device geometry,” IEEE Trans. Nanotechnol., vol. 6, no. 3, pp. 368–373, May 2007. (link to article)
4) J. Knoch, S. Mantl, and J. Appenzeller, “Impact of the dimensionality on the performance of tunneling FETs: Bulk versus one-dimensional devices,” Solid-State Electronics, vol. 51, pp. 572–578, Apr. 2007. (link to article)
5) Y.-M. Lin, J. Appenzeller, Z. Chen, and Ph. Avouris, “Electrical transport and 1/f noise in semiconducting carbon nanotubes,” Physica E, vol. 37, pp. 72-77, Mar. 2007. (link to article)
6) M. Zhang, J. Knoch, J. Appenzeller, and S. Mantl, “Improved carrier injection in ultrathin-body SOI Schottky-barrier MOSFETs,” IEEE Electron Device Lett., vol. 28, no. 3, pp. 223–225, Mar. 2007. (link to article)
Conference Proceedings and Presentations
2023
1) H.-Y. Lan, J. Appenzeller, and Z. Chen, "Wafer-scale CVD Monolayer WSe2 p-FETs with Record-high 727 µA/µm ION and 490 µS/µm gmax via Hybrid Charge Transfer and Molecular Doping, IEDM Technical Digest, 10-2 (2023).(link to article)
2) J. Cai, P. Wu, R. Tripathi, Z. Chen, J. Kong, and J. Appenzeller, "Ultra-compact ternary content-addressable memory cell based on single ambipolar two-dimensional floating-gate transistor, 81st Device Research Conference (2023).
3) Z. Sun, C. Chen, J. Robinson, Z. Chen, and J Appenzeller, "A mobility study of monolayer MoS2 on low-κ/high-κ dielectrics, 81st Device Research Conference (2023).
2022
1) H.-Y. Lan, J. Appenzeller, and Z. Chen, "Dielectric Interface Engineering for High-Performance Monolayer MoS2 Transistors via hBN Interfacial Layer and Ta Seeding, IEDM Technical Digest, 7.6.1-7.6.4 (2022).(link to article)
2020
1) C.-S. Pang, P. Wu, J. Appenzeller, and Z. Chen, "Sub-1nm EOT WS2-FET with IDS > 600μA/μm at VDS=1V and SS < 70mV/dec at LG=40nm ", IEDM Technical Digest, 3.4.1-3.4.4 (2020).(link to article)
2) J. Appenzeller, "Probabilistic spin logic using probabilistic bits - p-bits ", Online: 78th Device Research Conference, (2020).
3) P. Wu, R. Zhou, C.-S.Pang, X. Liu, Z. Chen, and J. Appenzeller, "Contact resistance model for WSe2 Schottky-Barrier FETs ", 78th Device Research Conference, (2020).
4) T. Knobloch, J. Michl, D. Waldhoer, Y.Y. Illarionov, B. Stampfer, A.Grill, R. Zhou, P. Wu, M. Waltl, J. Appenzeller, and T. Grasser, "Analysis of single electron traps in nano-scaled MoS2 FETs at cryogenic temperatures", 78th Device Research Conference, (2020).
2019
1) R. Zhou and J. Appenzeller, "About the interplay between contact and channel resistance in MoS2 and its impact on mobility extraction," 77th Device Research Conference, ISBN: 978-1-7281-2111-6, 133-134 (2019).(link to article)
2018
1) F. Zhang, H. Zhang, P.R. Shrestha, Y. Zhu, K. Maize, Sergiy Krylyuk, A. Shakouri, J.P. Campbell, K.P. Cheung, L.A. Bendersky, A.V. Davydov and J. Appenzeller, "An Ultra-fast Multi-level MoTe2-based RRAM," Accepted by IEDM Technical Digest, (2018) (link to article)
2) Y. Zhu, F. Zhang, and J. Appenzeller, "Thickness Tunable Transport Properties in MoTe2 Field Effect Transistors," 76th Device Research Conference, ISBN: 978-1-5386-3027-3, 133-134 (2018) (link to article)
3) R. Zhou and J. Appenzeller, "Three-Dimensional Integration of Multi-Channel MoS2 Devices for High Drive Current FETs," 76th Device Research Conference, ISBN: 978-1-5386-3027-3, 255-256 (2018) (link to article)
4) P. Wu and J. Appenzeller, "High Performance Complementary Black Phosphorus FETs and Inverter Circuits Operating at Record-Low VDD down to 0.2V," 76th Device Research Conference, ISBN: 978-1-5386-3027-3, 249-250 (2018) (link to article)
2017
1) A. Prakash, P. Wu and J. Appenzeller (invited), "Band-to-Band Tunneling Devices from Two-Dimensional Materials," 48th IEEE Semiconductor Interface Specialists Conference (SISC), San Diego, CA, 2017 (link to article)
2) C.-L. Lo, S. Zhang, T. Shen, J. Appenzeller, and Z. Chen, "BEOL Compatible 2D Layered Materials as Ultra-Thin Diffusion Barriers for Cu Interconnect Technology," 75th Device Research Conference (DRC), ISBN: 978-1-5090-6327-7, 213-214 (2017). Notre Dame, Indiana, June 25-28, 2017 (link to article)
3) P. Wu, A. Prakash, and J. Appenzeller, "First Demonstration of Band-to-Band Tunneling in Black Phosphorus," 75th Device Research Conference (DRC), ISBN: 978-1-5090-6327-7, 43-44 (2017). Notre Dame, Indiana, June 25-28, 2017 (link to article)
4) F. Zhang, Y. Zhu, and J. Appenzeller, "Novel Two-Terminal Vertical Transition Metal Dichalcogenide Based Memory Selectors," 75th Device Research Conference (DRC), ISBN: 978-1-5090-6327-7, 113-114 (2017). Notre Dame, Indiana, June 25-28, 2017 (link to article)
5) J. Appenzeller (invited), "Dimensionality Matters: Electronic Transport in 2D Layered Materials," 75th Device Research Conference (DRC), ISBN: 978-1-5090-6327-7, 37 (2017). Notre Dame, Indiana, June 25-28, 2017 (link to article)
2016
1) P. Debashis, R. Faria, K.Y. Camsari, J. Appenzeller, S. Datta, and Z. Chen, "Experimental Demonstration of Nanomagnet Networks as Hardware for Ising Computing," IEDM Technical Digest, XX-XX (2016). (link to article)
2014
1) A. Prakash, S. Das, R. Mehta, Z. Chen, and J. Appenzeller, "Ionic Gated WSe2 FETs: Towards Transparent Schottky Barriers," 72th Device Research Conference (DRC), 129-130 (2014). (link to article)
2012
1) Y. Gao, Y.J. Kubo, C.-C. Lin, Z. Chen, and J. Appenzeller, "Optimized spin relaxation length in few layer graphene at room temperature," IEDM Technical Digest, 80-83 (2012). (link to article)
2011
1) H.-Y. Chen and J. Appenzeller, "Complementary - Type graphene inverters operating at room-temperature," 69th Device Research Conference (DRC), Santa Barbara, CA (2011). (link to article)
2) S. Das and J. Appenzeller, “An all-graphene radio frequency low noise amplifier,” 2011 Radio Frequency Integrated Circuits Symposium (RFIC), Baltimore, MD (2011). (link to article)
3) A. Razavieh, N. Singh, A. Paul, G. Klimeck, D. Janes, and J. Appenzeller, “A new method to achieve RF linearity in SOI nanowire MOSFETs,” 2011 Radio Frequency Integrated Circuits Symposium (RFIC), Baltimore, MD (2011). (link to article)
2010
1) Y. Zhao, J. T. Smith, C. Yang, J. Appenzeller, “Controlled Growth and Electrical Characterization of Ge/Si Core/Shell Nanowires with Doped Shells,” Fall 2010 Materials Research Society (MRS) Conference, Boston, MA (2010).
2) J. T. Smith, Y. Zhao, A. Razavieh, C. Yang, J. Appenzeller, “Ge/Si Core/Shell Nanowire Structures for Tunneling Devices,” 218th Electrochemical Society (ECS) Trans., 33(6), pp. 707-714. Las Vegas, NV (2010). (link to article)
3) Y. Zhao, J. T. Smith, C. Yang, J. Appenzeller, “Transport Modulation in Ge/Si Core/Shell Nanowires through Controlled Synthesis of Doped Si Shells,” 2010 Electronic Materials Conference (EMC), South Bend, IN (2010).
4) J. T. Smith, Y. Zhao, C. Yang, J. Appenzeller, “Effects of Nanoscale Contacts to Silicon Nanowires on Contact Resistance: Characterization and Modeling,” 68th Device Research Conference (DRC), South Bend, IN (2010). (link to article)
2009
1) D. Candebat, Y. Zhao, C. Sandow, B. Koshel, C. Yang, and J. Appenzeller, “InSb nanowire field-effect transistors - electrical characterization and material analysis,” 67th Device Research Conference (DRC), University Park, PA (2009). (link to article)
2) Y. Sui and J. Appenzeller, “Multi-layer graphene field-effect transistors for improved device performance,” 67th Device Research Conference (DRC), University Park, PA (2009). (link to article)
3) J. Appenzeller, Y. Sui, and Z. Chen, “Graphene nanostructures for device applications,” in 2009 Symposium on VLSI Technology Digest, pp. 124–127, Honolulu, HI (2009) – INVITED. (link to article)
4) Z. Chen and J. Appenzeller, “Gate modulation of graphene contacts - on the scaling of graphene FETs,” in 2009 Symposium on VLSI Technology Digest, pp. 128–129, Honolulu, HI (2009). (link to article)
2008
1) Z. Chen and J. Appenzeller, “Mobility extraction and quantum capacitance impact in high performance graphene field-effect transistor devices,” in IEDM Tech. Dig., San Francisco, CA (2008). (link to article)
2007
1) Z. Chen, J. Appenzeller, P. Solomon, Y.-M. Lin, and Ph. Avouris, “Gate work function engineering for nanotube-based circuits,” in ISSCC Tech. Dig., San Francisco, CA (2007). (link to article)
