Publications

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Journal Articles

2011 | 2010 | 2009 | 2008 | 2007

Conference Proceedings and Presentations

2011 | 2010 | 2009 | 2008 | 2007

Journal Articles

2011

1)   J. T. Smith, S. Das, and J. Appenzeller, “Broken-gap tunnel MOSFET: A constant-slope sub-60-mV/decade transistor,” IEEE Electron Device Lett., vol. 32, no. 10, Oct. 2011. (link to article)

2)   S. Das and J. Appenzeller, “FETRAM - An organic ferroelectric material based novel random access memory cell,” Nano Lett., vol. 11, pp. 4003–4007, Sep. 2011. (link to article)

3)   S. Das and J. Appenzeller, “On the importance of band gap formation in graphene for analog device application,” IEEE Trans. Nanotechnol., vol. 10, no. 5, pp. 1093–1098, Sep. 2011. (link to article)

4)   J. T. Smith, C. Sandow, S. Das, R. A. Minamisawa, S. Mantl, and J. Appenzeller, “Silicon nanowire tunneling field-effect transistor arrays: Improving subthreshold performance using excimer laser annealing,” IEEE Trans. Electron Dev., vol. 58, no. 7, pp. 1822–1829, Jul. 2011. (link to article)

5)   Y. Zhao, J. T. Smith, J. Appenzeller, and C. Yang, “Transport modulation in Ge/Si core/shell nanowires through controlled synthesis of doped Si shells,” Nano. Lett., vol. 11, pp. 1406–1411, Apr. 2011. (link to article)

6)   Y. Sui, T. Low, M. Lundstrom, and J. Appenzeller, “Signatures of disorder in the minimum conductivity of graphene,” Nano. Lett., vol. 11, pp. 1319–1322, Mar. 2011. (link to article)

2010

1)   J. Knoch and J. Appenzeller, “Modeling of high-performance p-type III-V heterojunction tunnel FETs,” IEEE Electron Device Lett., vol. 31, no. 4, pp. 305–307, Apr. 2010. (link to article)

2009

1)   T. Low and J. Appenzeller, “Electronic transport properties of a tilted graphene p-n junction,” Phys. Rev. B, vol. 80, pp. 155406-1–7, Oct. 2009. (link to article)

2)   Y. Sui and J. Appenzeller, “Screening and interlayer coupling in multilayer graphene field-effect transistors,” Nano. Lett., vol. 9, pp. 2973–2977, Aug. 2009. (link to article)

3)   T. Low, S. Hong, J. Appenzeller, S. Datta, and M. S. Lundstrom, “Conductance asymmetry of graphene p-n junction,” IEEE Trans. Electron Dev., vol. 56, no. 6, pp. 1292–1299, Jul. 2009. (link to article)

2008

1)   J. Appenzeller, J. Knoch, M. I. Bjork, H. Riel, H. Schmid, and W. Riess, “Toward nanowire electronics,” IEEE Trans. Electron Dev., vol. 55, no. 11, pp. 2827–2845, Nov. 2008. (link to article)

2)   O. Gunawan, L. Sekaric, A. Majumdar, M. Rooks, J. Appenzeller, J. W. Sleight, S. Guha, and W. Haensch, “Measurement of carrier mobility in silicon nanowires,” Nano. Lett., vol. 8, pp. 1566–1571, Jun. 2008. (link to article)

3)   J. Knoch, W. Riess, and J. Appenzeller, “Outperforming the conventional scaling rules in the quantum-capacitance limit,” IEEE Electron Device Lett., vol. 29, no. 4, pp. 372–374, Apr. 2008. (link to article)

4)   J. Knoch and J. Appenzeller, “Tunneling phenomena in carbon nanotube field-effect transistors,” Phys. Stat. Sol. (A), vol. 205, no. 4, pp. 679–694, Apr. 2008. (link to article)

5)   J. Appenzeller, “Carbon nanotubes for high-performance electronics - Progress and prospect,” Proc. IEEE, vol. 96, pp. 201–211, Feb. 2008. (link to article)

6)   Z. Chen, D. Farmer, S. Xu, R. Gordon, P. Avouris, and J. Appenzeller, “Externally assembled gate-all-around carbon nanotube field-effect transistor,” IEEE Electron Device Lett., vol. 29, no. 2, pp. 183–185, Feb. 2008. (link to article)

2007

1)   J. Knoch, M. Zhang, J. Appenzeller, and S. Mantl, “Physics of ultrathin-body silicon-on-insulator Schottky-barrier field-effect transistors,” Appl. Phys. A, vol. 87, pp. 351–357, Jun. 2007. (link to article)

2)   K. M. Indlekofer, J. Knoch, and J. Appenzeller, “Understanding Coulomb effects in nanoscale Schottky-barrier-FETs,” IEEE Trans. Electron Dev., vol. 54, no. 6, pp. 1502–1509, Jun. 2007. (link to article)

3)   J. Appenzeller, Y.-M. Lin, J. Knoch, Z. Chen, and Ph. Avouris, “1/f noise in carbon nanotube devices - On the impact of contacts and device geometry,” IEEE Trans. Nanotechnol., vol. 6, no. 3, pp. 368–373, May 2007. (link to article)

4)   J. Knoch, S. Mantl, and J. Appenzeller, “Impact of the dimensionality on the performance of tunneling FETs: Bulk versus one-dimensional devices,” Solid-State Electronics, vol. 51, pp. 572–578, Apr. 2007. (link to article)

5)   Y.-M. Lin, J. Appenzeller, Z. Chen, and Ph. Avouris, “Electrical transport and 1/f noise in semiconducting carbon nanotubes,” Physica E, vol. 37, pp. 72-77, Mar. 2007. (link to article)

6)   M. Zhang, J. Knoch, J. Appenzeller, and S. Mantl, “Improved carrier injection in ultrathin-body SOI Schottky-barrier MOSFETs,” IEEE Electron Device Lett., vol. 28, no. 3, pp. 223–225, Mar. 2007. (link to article)

 

Conference Proceedings and Presentations

2011

1)   H.-Y. Chen and J. Appenzeller, "Complementary - Type graphene inverters operating at room-temperature," 69th Device Research Conference (DRC), Santa Barbara, CA (2011). (link to article)

2)   S. Das and J. Appenzeller, “An all-graphene radio frequency low noise amplifier,” 2011 Radio Frequency Integrated Circuits Symposium (RFIC), Baltimore, MD (2011). (link to article)

3)   A. Razavieh, N. Singh, A. Paul, G. Klimeck, D. Janes, and J. Appenzeller, “A new method to achieve RF linearity in SOI nanowire MOSFETs,” 2011 Radio Frequency Integrated Circuits Symposium (RFIC), Baltimore, MD (2011). (link to article)

2010

1)   Y. Zhao, J. T. Smith, C. Yang, J. Appenzeller, “Controlled Growth and Electrical Characterization of Ge/Si Core/Shell Nanowires with Doped Shells,” Fall 2010 Materials Research Society (MRS) Conference, Boston, MA (2010).

2)   J. T. Smith, Y. Zhao, A. Razavieh, C. Yang, J. Appenzeller, “Ge/Si Core/Shell Nanowire Structures for Tunneling Devices,” 218th Electrochemical Society (ECS) Trans., 33(6), pp. 707-714. Las Vegas, NV (2010). (link to article)

3)   Y. Zhao, J. T. Smith, C. Yang, J. Appenzeller, “Transport Modulation in Ge/Si Core/Shell Nanowires through Controlled Synthesis of Doped Si Shells,” 2010 Electronic Materials Conference (EMC), South Bend, IN (2010).

4)   J. T. Smith, Y. Zhao, C. Yang, J. Appenzeller, “Effects of Nanoscale Contacts to Silicon Nanowires on Contact Resistance: Characterization and Modeling,” 68th Device Research Conference (DRC), South Bend, IN (2010). (link to article)

2009

1)   D. Candebat, Y. Zhao, C. Sandow, B. Koshel, C. Yang, and J. Appenzeller, “InSb nanowire field-effect transistors - electrical characterization and material analysis,” 67th Device Research Conference (DRC), University Park, PA (2009). (link to article)

2)   Y. Sui and J. Appenzeller, “Multi-layer graphene field-effect transistors for improved device performance,” 67th Device Research Conference (DRC), University Park, PA (2009). (link to article)

3)   J. Appenzeller, Y. Sui, and Z. Chen, “Graphene nanostructures for device applications,” in 2009 Symposium on VLSI Technology Digest, pp. 124–127, Honolulu, HI (2009) – INVITED. (link to article)

4)   Z. Chen and J. Appenzeller, “Gate modulation of graphene contacts - on the scaling of graphene FETs,” in 2009 Symposium on VLSI Technology Digest, pp. 128–129, Honolulu, HI (2009). (link to article)

2008

1)   Z. Chen and J. Appenzeller, “Mobility extraction and quantum capacitance impact in high performance graphene field-effect transistor devices,” in IEDM Tech. Dig., San Francisco, CA (2008). (link to article)

2007

1)  Z. Chen, J. Appenzeller, P. Solomon, Y.-M. Lin, and Ph. Avouris, “Gate work function engineering for nanotube-based circuits,” in ISSCC Tech. Dig., San Francisco, CA (2007). (link to article)