Purdue-P is an effort to design and implement devices to solve today's most difficult problems using Probabilistic Spin Logic.
The majority of today’s digital circuitry is based on building blocks called bits that are deterministically 0 or 1. At the other end of the spectrum are quantum computers consisting of qubits which occupy some superposition of 0 and 1. The probabilistic-bit occupies a niche between these extremes, sharing qualities with both the classical-bit and the quantum-bit. The p-bit fluctuates probabilistically between 0 and 1, and can be pinned to one or the other state based on the magnitude and sign of its input.
Just as a bit is only useful when in conjunction with other bits, p-bits can be correlated by weights to form p-circuits. These circuits can be programmed to tackle a variety of problems, ranging from simulating quantum problems to executing machine learning. It is in the variety of applications, and the classical nature of the p-bit that this building block comes to life. Probabilistic Spin Logic entails the study of these probabilistic networks.
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Invertible Boolean Logic
A set of weights and biases that capture the behavior of some boolean expression can be implemented in a p-circuit. Pinning the output of this p-circuit will encourage the input p-bits to occupy states that satisfy the expression.
The Purdue-P web simulator and Purdue-P Coprocessor have been developed to simplify probabilistic spin logic execution. The web simulator comes pre-loaded with example problems, while the coprocessor provides a powerful, asynchronous execution method to study and execute large scale p-circuits.
Purdue-P Web Simulator
Play around with the idea of probabilistic spin logic with the Purdue-P web simulator. See how this framework can solve problems ranging from Max-Cut to factorization in a simulator that runs the same algorithms as the FPGA.
Set up MATLAB to connect to the Purdue-P coprocessor and gain access to optimized hardware that models probabilistic circuits asynchronously. The FPGA coprocessor can expedite MATLAB to allow studying larger networks faster.
Visit the Purdue-P blog for up to date news and experimental work on probabilistic spin research.
Visit New Era Electronics for more efforts from Purdue like Purdue-P.
Integer factorization using stochastic magnetic tunnel junctions
Authors: William A. Borders, Ahmed Z. Pervaiz, Shunsuke Fukami, Kerem Y. Camsari, Hideo Ohno & Supriyo Datta
Abstract: Conventional computers operate deterministically using strings of zeros and ones called bits to represent information in binary code. Despite the evolution of conventional computers into sophisticated machines, there are many classes of problems that they cannot efficiently address, including inference, invertible logic, sampling and optimization, leading to considerable interest in alternative computing schemes. Quantum computing, which uses qubits to represent a superposition of 0 and 1, is expected to perform these tasks efficiently [1,2,3]....
Access at: https://www.nature.com/articles/s41586-019-1557-9
Dmitri E. Nikonov commentary: https://www.nature.com/articles/d41586-019-02742-x
Nature Editorial: https://www.nature.com/articles/d41586-019-02781-4
Weighted p-bits for FPGA Implementation of Probabilistic Circuits
Authors: A.Z.Pervaiz, B.M.Sutton, L.A.Ghantasala, and K.Y. Camsari
Abstract: Probabilistic spin logic is a recently proposed computing paradigm based on unstable stochastic units called probabilistic bits (p-bits) that can be correlated to form probabilistic circuits (p-circuits). These p-circuits can be used to solve the problems of optimization, inference, and implement precise Boolean functions in an ``inverted'' mode, where a given Boolean circuit can operate in reverse to find the input combinations that are consistent with a given output...
Access at: https://ieeexplore.ieee.org/document/8515266
Scalable Emulation of Stoquastic Hamiltonians with Room Temperature p-bits
Authors: K.Y. Camsari, S. Chowdhury and S.Datta
Abstract: Exploiting a well-established mapping from a d-dimensional quantum Hamiltonian to a d+1-dimensional classical Hamiltonian that is commonly used in software quantum Monte Carlo algorithms, we propose a scalable hardware emulator where quantum circuits are emulated with room temperature p-bits. The proposed emulator operates with probabilistic bits (p-bit) that fluctuate between logic 0 and 1, that are suitably interconnected with a crossbar of resistors or conventional CMOS devices...
Access at: https://arxiv.org/abs/1810.07144
p-Bits for Probabilistic Spin Logic
Authors: K.Y. Camsari, B.M.Sutton and S.Datta
Abstract: We introduce the concept of a probabilistic or p-bit, intermediate between the standard bits of digital electronics and the emerging qubits of quantum computing. We show that low barrier magnets or LBM's provide a natural physical representation for p-bits and can be built either from perpendicular magnets (PMA) designed to be close to the in-plane transition or from circular in-plane magnets (IMA). Magnetic tunnel junctions (MTJ) built using LBM's as free layers can be combined with standard NMOS transistors to provide three-terminal building blocks for large scale probabilistic circuits that can be designed to perform useful functions...
Access at: https://arxiv.org/abs/1809.04028