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Program Details

Who is eligible : US citizen undergraduate students with a GPA of 2.8 or above, in first-year engineering or an eligible engineering major (Electrical & Computer Engineering, Materials Engineering, Mechanical Engineering, Nuclear Engineering and First-Year Engineering), with interest in careers in microelectronics.  Eligible universities in each technical area in microelectronics are as follows:

Radiation Hardening

  • Vanderbilt
  • Air Force Institute of Technology
  • St. Louis University
  • Brigham Young University
  • Arizona State University
  • Georgia Tech
  • Purdue University
  • New Mexico State University
  • University of Tennessee-Chattanooga

Heterogeneous integration and advanced packaging

  • Purdue University
  • Georgia Tech
  • SUNY-Binghamton
  • Arizona State University

System on Chip

  • Ohio State University
  • Georgia Tech
  • Purdue University
  • UC-Berkeley

Application Process: please complete the form HERE by Thursday, October 15, 2021.

What happens after I apply: your application due on October 15 will be vetted by the faculty members at your university, and you’ll receive information as to whether you qualify for the program and if so, what the next steps will be.

Technical Areas in Microelectronics

Radiation-Hardening

  • Radiation in natural and manmade environments can greatly affect the operation and long-term performance of microelectronics
  • Radiation hardening is making electronic components and circuits resistant to damage or malfunction caused by high levels of ionizing radiation
  • Transient effects include single-event effects like memory bit flips; permanent effects include single-event latchups that prevent individual devices from operating
  • Mitigation approaches include radiation-hardening by process and radiation-hardening by design

System on Chip

  • Moore’s law has led to an exponential increase in the number of devices that can fit onto a single chip
  • This has led to a new era where most electronic systems contain chips that integrate various (hitherto discrete) components such as microprocessor, DSPs, dedicated hardware processing engines, memories, and interfaces to I/O devices and off-chip storage.
  • Most electronic systems today - cell phones, iPods, set-top boxes, digital TVs, automobiles - contain at least one such System-on-chip (SoC)
  • Designing SoCs is a highly complex process. Before entering the traditional VLSI implementation process (RTL, logic & physical design), designers must perform the challenging tasks of developing a functional specification, partitioning and mapping of functions onto hardware components and software, developing a communication architecture to interconnect the components, functional/performance/power analysis and validation, and more.

Heterogeneous Integration/Advanced Packaging

  • The rapid increase in chip performance associated with Moore’s law has also raised interest and expectations around creating packaging devices with improved size, weight, power
  • To keep sizes manageable while improving functionality, complex packaged electronics like iPhones require similar components to be compressed together horizontally and vertically, and combined with dissimilar components providing complementary functions
  • Significant challenges in heterogeneous integration include maintain reliability of connections such as solder bumps, managing thermal cycling, and limiting damage from mechanical stress that can cause failures

Please contact Mignon Evans, Lead Administrative Assistant for SCALE, mvevans@purdue.edu with any questions.